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L1 cache reference 0.5ns
一级缓存引用Branch mispredict 5ns
分支错误预测L2 cache reference 7ns
二级缓存引用Mutex lock 100ns
互斥锁定Main memory reference 100ns
主存引用Compress 1K bytes with Zippy 10,000ns
用Zippy压缩1K字节Send 2K bytes over 1 Gbps network 20,000ns
通过1Gbps网络发送2K字节Read 1 MB sequentially from memory 250,000ns
从内存中读取1MBRound trip within same datacenter 500,000ns
数据中心的往返路程Disk seek 10,000,000ns
磁盘寻道Read 1 MB sequentially from network 10,000,000ns
从网络连续读取1MBRead 1 MB sequentially from disk 30,000,000ns
从磁盘连续读取1MBSend packet CA->Netherlands->CA 150,000,000ns
在CA向荷兰发包再返回
补充一段关于Branch mispredict的介绍：来自Wiki
Branch misprediction occurs when a (CPU) mispredicts the next instruction to process in , which is aimed at speeding up execution.
During the execution of certain programs there are places where the program execution flow can continue in several ways. These are called , or conditional jumps. The CPU also uses a which allows several instructions to be processed at the same time. When the code for a conditional jump is read we do not yet know the next instruction to execute and insert into the execution pipeline. This is where comes in.
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